Research in Computer Science and Informatics at the University of Portsmouth

Example of addiional information provided to 2008 RAE

RA2

OtherDetails

Efficient implementation of a biologically motivated model of associative memory.Takes an established model of associative memory - Kanerva's Sparse Distributed Memory (SDM) - and simplifies it to yield a much lower-cost implementation, based on N-of-M codes, that can be implemented using spiking neurons and binary unipolar synaptic weights with a simple Hebbian learning rule.The new SDM is analysed theoretically and experimentally (by numerical simulation) and is shown to be efficient, robust to input noise, and more 'biologically-plausible' than Kanerva's original SDM.

New circuits that implement on-chip communication using ternary (3-state) logic, which is particularly suited to self-timed communication as it allows 0-null-1 to be transmitted on a single wire.Shows that the problems of complexity and high power associated with the earlier application of ternary logic to combinatorial functions can be avoided in on-chip communication, where there are potential advantages in terms of reduced wiring and power-saving. On-chip communication increasingly dominates the performance and power-consumption of modern chips.

Overview of an innovative self-timed Network-on-Chip (NoC) technology - the world's first fully-developed self-timed NoC fabric, supporting packet-switched on-chip communications using asynchronous circuits.Describes the technology behind Silistix Ltd (John Bainbridge, Chief Technical Officer), a company spun-out to commercialise tools for self-timed NoC design. Since its launch in December 2003 Silistix has attracted over £6M of venture capital funding from a consortium led by Intel Capital, and currently employs 14 engineers in Manchester with a sales office in California.ISI citations 11; Google-Scholar citations 55(11pa).

Methodology for the design, analysis and implementation of asynchronous communication systems, using a new inter-chip communications protocol (devised by Furber) as an example.Proposes direct translation from a Petri-net specification to a logic implementation, resulting in a provably correct and efficient implementation.Demonstrates that the protocol solves the problem of an idle system (inactive for power-efficiency reasons) being woken by both ends simultaneously, creating a difficult asynchronous arbitration problem. Efficient implementations of the protocol have proved elusive.Presents the results of extensive simulation-based testing showing significant performance gains over conventional implementation methods.